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Job Ad content for Vanipenta Subba Reddy

Looking for Sr RTL Design Engineer in San Jose, CA area and should work on SGCDC for SOC, Subsystems and IPs. FEBE, LEC and Caliber for SOC and SS. Responsible for complete Ownership for Identifying the Design bugs by writing CDC constraints at SOC top level, collecting the Abstracts from SS and suggesting the required fixes for SOC and SS teams. Working with IP teams for the abstract generation and required RTL fixes. SGCDC goals including CDC setup checks, CDC verify struct, rdc verify struct and CDC Verify func Goals. Tools Include Synopsis DC, Spyglass, VCS, Verdi for RTL Debug, Git and nbflow. Req: MS in Electronics Engineering. Ex: 1 yr. Alt Occu: Sr. Project Engineer. Willing to travel to client sites throughout the US. EOE. Email: seshadri.polisetty@cerium- systems.com, Tech Mahindra Cerium Systems Inc, 1735 Technology Drive, Suite # 575, San Jose, CA 95110.

Job Ad content for Pramod Gayalkar

Looking for Sr Verification Engineer in San Jose, CA area and should work on Verifying single- and double-bit error scenarios, improve code coverage by writing different tests, verifying data integrity and timing checks between PHY and DRAM, Debugging and coding multiple test sequences to verify DDR4/LPDDR4 features, Verification of DATA Functional Block. Req: MS in VLSI Design/Electronics. Ex: 1 yr. Alt Occu: Sr. Project Engineer. Willing to travel to client sites throughout the US. EOE. Email: seshadri.polisetty@cerium- systems.com, Tech Mahindra Cerium Systems Inc, 1735 Technology Drive, Suite # 575, San Jose, CA 95110.